Advice

Many problems in achieving proper Crestron control of Q-SYS can be resolved by following some fundamental best practices and understanding some basic background of the reasons for them:

• It has been found that it is better to delay the “Initialize” signal of the QSYS Core module by a few seconds (10-15 seconds, or more) after the start-up of the Crestron program.  Crestron’s sample program (that comes with the V4.2.1 series modules) implements that suggestion.  The module Help PDF recommends a pulse as opposed to a solid logic “high”; that may be more flexible in allowing for module re-initialization programmatically.
• While both the “Connected” and “Initialized” signals generally go "high" at the same time and maintain that status while Crestron and Q-SYS are connected, that is not always the case.  Crestron states that the “Initialized” output should drive the individual modules; that is best practice at all times.
• The “Initialize” on individual modules must be held “high”, as one portion of ensuring that an individual module gets registered by the Core module and in turn registered in a Q-SYS Change Group.
• The “Poll_Enable” signal on individual modules must be held “high” at any time that viewing feedback from a control is desired (ex. when viewing a control value on a specific UCI page, or when requiring the control value in logic).  Polling rate is defined by the Core module.  It the signal is left “low”, the module will not register as requiring feedback changes from Q-SYS.  Disabling “Poll_Enable” will remove the control from any Change Groups on Q-SYS, leaving just the outgoing control for use and all subsequent feedback within the Crestron program itself.